Field of the Invention
The present disclosure relates to a display device, and more particularly, to a shift register and a display device including the shift register capable of reducing a bezel size.
Discussion of the Related Art
A display device is configured such that data lines and gate lines are disposed to cross each other at right angles and pixels are arranged in a matrix form. A video data voltage is supplied to the data lines, and a gate pulse is sequentially supplied to the gate lines. The video data voltage is supplied to pixels of a display line supplied with the gate pulse, and all of display lines are sequentially scanned by the gate pulse and display video data.
A gate driving circuit of a flat panel display for supplying a gate pulse to gate lines generally includes a plurality of gate driver integrated circuits (ICs). Each gate driver IC basically includes a shift register for sequentially outputting the gate pulse. Each gate driver IC may further include a plurality of circuits for controlling output voltages of the shift register based on driving characteristics of a display panel and a plurality of output buffers.
In the display device, a gate driver producing a scan signal (i.e., the gate pulse) may be implemented as a gate-in-panel (GIP) type gate driver configured as a combination of thin film transistors in a bezel area (i.e., a non-display area) of the display panel. The GIP type gate driver includes stages corresponding to the number of gate lines, and the stages respectively corresponding to the gate lines output the gate pulse to the gate lines. Thus, because the number of stages required in the gate driver is the same as the number of gate lines, a GIP structure leads to an increase in a size of the bezel area.